Single-Ended Sub-Threshold FinFET based 8T SRAM Cell

In modern IC’s scaling the supply voltage aggressively in SRAM which minimizes the active and leakage power. In the energy constrained application performance requirements are not an important factor, SRAM offers a read and write operation at the lowest supply voltage? In previous work, high -density bit cells are failed to operate at low voltage. In this project, high- density FINFET based 8T SRAM cell is designed with a single bit line which operates at the lower supply voltage. This is also used to achieve the parameter a low leakage power. The parameter is measured in the proposed system is leakage power. The proposed FINFET based 8T SRAM design and simulated using tannertool.