Advanced Phase-Locked Loop (PLL) Design and Evaluation for Reference Current Generation

Background/Objectives: The study aimed to design and optimize advanced Phase- Locked Loop (PLL) systems for accurately capturing the Fundamental Frequency Positive Sequence (FFPS) in power systems, evaluate various PLL architectures, and explore parameter optimization techniques to enhance performance, stability, and responsiveness under varying grid conditions. Methods: The methodology involved developing different PLL architectures, implementing parameter optimization techniques, conducting simulations to assess performance in scenarios with harmonic distortion and frequency variations, and performing laboratory experiments for real-world validation. Findings: The findings revealed significant improvements in the accuracy and stability of FFPS capturing, with the optimized PLLs demonstrating enhanced performance under diverse grid conditions, ultimately contributing to improved power quality and reliability. Additionally, the integration of these PLL systems with power quality compensators showcased potential for seamless operation, effectively addressing challenges posed by grid disturbances. Overall, this research provides a solid foundation for future advancements in PLL technology, particularly relevant to the evolving landscape of smart grids and renewable energy integration.