GRENZE International Journal of Engineering and Technology
Vol. 11
(2025), Issue 1
Steganography using Verilog by LSB
Authors
Chetan Umadi, Nagarathana R, R. Tushitaa, Riya Jain, Shreeja, Shreya S
Abstract
This research paper explores using Least Significant Bit (LSB) steganography to embed text within digital images, implemented using Verilog in the Cadence environment. The method ensures secure, imperceptible data hiding by modifying the least significant bits of pixel values, preserving image quality with minimal visual distortion. The process involves data preparation (converting pixels and text to binary using MATLAB), encoding (embedding text in pixel bits sequentially), and decoding (extracting hidden data). Each stage is optimized for computational efficiency. The successful Verilog-based implementation highlights the feasibility of hardware-level data hiding, with future potential for integrating cryptographic techniques to enhance security.
Pages:
1187 - 1194