An Area and Power Efficient Kogge Stone Adder using Gate Diffusion Input Logic

Gate Diffusion Input Logic (GDI) is utilized to build a novel design method for an area and efficient Kogge Stone adder, a widely used high-speed parallel adder. The aim of this is to reduce the space required for the circuit while maintaining the same degree of performance by utilizing the Gate Diffusion Input Logic (GDI). The study gives a thorough examination of the circuit architecture, power estimation, area estimation, and delay analysis of the GDI logic-based Kogge Stone adder. The proposed design is compared in terms of area, power, and delay to the Kogge Stone adders, which use CMOS (Complementary Metal-Oxide Semiconductor) and Pass Transistor Logic (PTL). The findings suggest that the GDI logic-based design may be beneficial for digital signal processing and other applications requiring compact, low-power and low-area calculations. This analysis makes use of the Tanner EDA Tool