Power Reduction in Ripple Carry Adder Circuit using SAPON and LCNT Techniques

Ripple carry adders, however simple in design, retain precious operations that make them a necessary tool in the world of digital circuits. These adders find their place within the core of processors and Arithmetic Logic Units (ALUs), effortlessly performing essential computation operations with precision and reliability. Ripple carry adders exhibit commendable power efficiency, ensuring optimal energy utilization in digital circuits. With their streamlined design and efficient operation, these adders minimize power consumption, making them a smart choice for energy-conscious applications where every watt counts. Two cutting-edge techniques are opted to enhance the power efficiency of the ripple carry adder: Leakage Control NMOS Transistor (LCNT) and Stackly Arranged low Power ON transistor (SAPON). Less power is needed in the LCNT approach by making the route between the supply voltage (VDD) and the GND (ground) more resistive. During the changeover step, SAPON avoids leakage current from a short circuit. The power consumption is reduced in RCA circuit using low power reduction ways like LCNT, SAPON. These circuits are dissembled in the cadence tool with 45nm technology