Design and Hardware Development of 7 Level Inverter with Reduced Switches

Multilevel Inverters have been gaining increased utilization for their applications with PV generation and other renewable resources in smart grid. The main aim of this work is to develop a Seven Level Multi-Level Inverter circuit with reduced switches. Lesser number of power switches will reduce the switching losses and complexity of the system. Power Mosfets are used for the switches as they have better commutation speed and switching efficiency at lower voltage levels. Pulse Width Modulation technique is used to provide the gating signals for the mosfets and a microcontroller is used to generate these pwm signals. LC filters are used to obtain pure sinusoidal output. The proposed inverter focuses on reducing the number of switches used to obtain seven level output which in turn will reduce the number of gate driver circuits required for driving the mosfets. Simulation of the inverter is carried out in MATLAB Simulink. Hardware Model of this inverter circuit is been designed for 24V and the output of the inverter is used to run motor load.