Abstract

This paper deals with the design of fractional order oscillator with improved trans conductance and other parameters such as gain and Common Mode Rejection Ratio (CMRR) using 2-stage current mirror. The original Complimentary MOSFET (CMOS) 180 nm arrangement has been additionally provided biasing through current mirror technique, simulating them after that it provides trans conductance as 5.272 siemens. This high trans conductance is obtained at the expense of a decrease in output current eventually leading to a decrease in overall current gain. Differential gain though is increased along with the small signal parameters. In the proposed methodology, the supply voltage is ±0.5 V which is far less than the supply voltage in the other counterparts. The high trans conductance of proposed OTA is obtained by using current-mirror circuit.