Study of Improved Topologies of NanowireMOSFET: Solution to Doping Control Issues
Journal:
GRENZE International Journal of Engineering and Technology
Authors:
Krishan Kumar, Ashish Raman
Volume:
6
Issue:
2
Grenze ID:
01.GIJET.6.2.7
Pages:
77-82
Abstract
As we know that technology is improving day by day, due to this the number of
transistors on chip should be doubled every year as per “Moore’s Law”. Hence, the size of
transistor should be reduced to follow this scaling trend but using conventional planar
MOSFET we cannot reduce the size of transistor to a limit. This is happened because of
short channel effects (SCEs), which degrades MOSFET performance at lower dimensions.
But there are many alternate structures like nanotube, nanowire, graphene etc. which will
help in reducing the size of transistor by offering lower SCEs. In this paper, we will discuss
about various types of nanowire MOSFETs and their analog performances like ION, IOFF,
ION/IOFF current ratio. Beside this, an in depth review of doping control issues and the
possible solutions in the nanowire MOSFETs are also presented.