Various Concepts Of Routing and the Evaluation Tools for NOC

Journal: GRENZE International Journal of Computer Theory and Engineering
Authors: Smita A Hiremath, R C Biradar
Volume: 3 Issue: 4
Grenze ID: 01.GIJCTE.3.4.64 Pages: 434-440

Abstract

This paper presents about the Network on Chip (NoC) and various concepts of routing and the evaluation tools used for it. As we know that the IC technology is scaling down day by day, Specifically the system on chip (SoC) i.e. the components present on the chip are scaled drastically every year therefore there is an increase in the complexity of the system this is due to the current requirements such as a device must be portable that means we have to optimize the area, low power consumption i.e. power optimization and also getting accurate results. To achieve these entire things one must go for in depth fabrication process by using the various technologies scaling hence there is an increase in the complexity. To avoid the routing complexities in such complex SoC devices we will go for NoC.

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