Enhancing AES Algorithm with Delay Optimization to Reduce Power Analysis Attack

Journal: GRENZE International Journal of Computer Theory and Engineering
Authors: Lavanya.V, Meghana K.S, Sahana H.R, Radhakrishna.M, T Vijaya Kumar
Volume: 3 Issue: 4
Grenze ID: 01.GIJCTE.3.4.48 Pages: 322-327

Abstract

The world is dependent on communication which requires the role in exchanging information and they have to be secured so that it will not be misused, this raised the concept of Encryption. One of the methodology used for encryption is AES algorithm. In this paper a cryptographical AES algorithm is implemented which is used for network security. In this algorithm a 128 bit plain text is bitwise Xored with 128bit key followed by a sequence of operations to produce a 128bit block cipher. This method is easier and faster to implement because the same key is used in both encryption and decryption , which in turn helps in high security. One of the threats in cryptography is Power analysis attack which may be because of timing attack, power consumption monitoring ,cache attack etc. The paper mainly concentrates on reducing time delay and thus reducing timing attacks.

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