Encoding Schemes For Power Reduction InNoc Links:A Review

Conference: Third International Conference on Current Trends in Engineering Science and Technology
Author(s): Anupama Sindgi, U.B.Mahadevaswamy Year: 2017
Grenze ID: 02.ICCTEST.2017.1.173 Page: 1002-1006

Abstract

This paper reviews different encoding schemes for reduction of power dissipation, crosstalk noise and delay. As the number of cores in a chip increases, the role played by the communication system becomes more crucial. An on-chip communication infrastructure based on the Network-on-Chip (NoC) paradigm is today recognized as the most effective and scalable solution. Amongst the communication resources, as technology shrinks, the power ratio between NoC links and routers increases making the links becoming more power hungry than routers. Crosstalk is increased by enhanced switching activity which is often main cause for the malfunctioning of any VLSI chip. Consequently, delay and power dissipation also increases due to enhanced crosstalk. Reduction in switching activities through coupled transmission line results in enormous reduction of power dissipation, crosstalk and delay. The researchers therefore often concentrate on encoding schemes that reduces the transitions of the signals. This paper reviews all such encoding schemes.

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ICCTEST - 2017