Abstract

This paper discusses about embedding various topologies on GIN family networks. In real multiprocessor / high computing environment, it becomes necessary to check the embedding / mapping of physical topology to logical topology, which is necessarily a graph mapping problem. This paper tries to map / embed frequently used topologies on GIN family network. The promising network variants like 3D-CGIN, CGIN along with original GIN are considered for mapping purpose. GIN variants with size 8 are considered for mapping. The paper presents the comparison of factors related to mapping. The inherent design of GIN makes it well suited for mapping permutation based networks. The mapping penalty is given in terms of additional hop count, to realize connectivity for a path in original network to the base network on which the original network is being mapped. Due to alternate source’s use this penalty is found to be negligible.