Abstract

Design complexity is increasing day by day in modern electronic systems. Due to reconfigurable architecture, low non recurring engineering (NRE) and ease of design Field Programmable Gate Arrays (FPGA) become a better solution for managing increasing design complexity. This paper provides a detailed comparative analysis of leakage of various benchmark circuits for defense applications. We have implemented a benchmark circuits (C6288) 16 * 16 multiplier and C880 (8-bit ALU) in Defense Grade Spartan-6Q Lower Power FPGA. Various enhanced power gating schemes has been imposed on LUT to analysis leakage. As compared to basic design, proposed design saves 15% of leakage power.