Abstract

Programmable reversible logic is emerging as a prospective logic design style for implementation in\nmodern nanotechnology and quantum computing with minimal impact on circuit heat generation. Recent advances in\nreversible logic using and quantum computer algorithms allow for improved computer architecture and\narithmetic logic unit designs. Arithmetic unit design using reversible logic gate has received much attention as it reduces\npower dissipation with no loss of information. This paper proposes the design of 32-bit Binary Coded Decimal (BCD)\naddition and subtraction unit using reversible logic gates. The reversible 32 -bit BCD addition unit is designed using the\nfollowing modules such as reversible 4-bit Carry Propagate unit using reversible logic gates such as Feynman gate and URG\ngate and a reversible 4-bit error correction unit. The 4-bit error correcting unit designed by reversible (4x1) Multiplexer\n(MUX) unit using Toffoli gate and TNOR gates to provide the output with a precise value. The reversible 32-bit BCD\nsubtraction unit is designed based on the nine’s complement method of 4-bit reversible BCD addition. The proposed design is\nsynthesized using Xilinx ISE software and simulated using VHDL test bench.