Abstract

Low-power layout is one of the most vital challenges to maximize battery life in portable devices and to\nsave the energy during simulation operation. Image and video compressor is widely used in Discrete Cosine Transform\n(DCT). Many types of techniques are used in design discrete cosine transform (DCT). Multiplier and adder are two main\ncomponents in design to DCT, Loeffer (1989) have developed a new architecture DCT, it consists of 11\nmultiplications and 29 additions. By now a day we required low chip area and fast speed algorithm, but the\nmultiplier consumed large area compared to adder. We are designed to multiplier less CORDIC (Coordinate\nRotation Digital Computer) algorithm based on DCT. CORDIC is a main component of shift and add for rotation vector\nand plan which is usually used for calculation of trigonometric functions. CORDIC algorithm is reduce slice resisters and\nLUTs compared to existing algorithms. All design are implementation Xilinx 14.1i and verified the result.