Design and Performance Comparison of Symmetric and Asymmetric Underlap Dual-K Spacer Finfets

Conference: International Conference on Soft Computing Applications in Wireless Communication
Author(s): Sanamdeep Singh, Sandeep Singh Gill, Navneet Kaur Year: 2017
Grenze ID: 02.SCAWC.2017.1.552 Page: 398-406


This paper investigates the innovation features of Symmetric and Asymmetric FinFET devices with dual-k spacer\nover traditional FinFET. The designed FinFET integrates three advanced technologies i.e. FinFET, ultra-thin body (UTB) and\nasymmetric Dual-k spacer on a substrate of silicon-on-insulator (SOI). Recently, Dual-k dielectric spacer materials are much\nsignificant for research because of their better electrical control and provide more immunity against short channel effects\n(SCEs) in nanoscale devices. This work presents symmetric and asymmetric dual-k dielectric spacer in the underlap areas of\nFinFET and performance has been analyzed.


SCAWC - 2017