Performance Analysis of Triangular Gate-all around Nanowire FETs with Si and GaAs as Channel Materials for Different Temperature values

Conference: International Conference on Soft Computing Applications in Wireless Communication
Author(s): Ripjeet Singh, Gurpurneet Kaur, Gurjot Kaur Walia Year: 2017
Grenze ID: 02.SCAWC.2017.1.36 Page: 157-161


In this paper, Triangular GAA NW FET has been designed for silicon and GaAs as channel materials of 20nm gate\nlength. The performance of GAA NW FETs are calculated and compared in terms of transfer characteristics, output\ncharacteristics, ION current, switching speed, leakage current, Drain Induced Barrier Lowering (DIBL), Sub-threshold Swing\n(SS) and threshold voltage (VTH). After comparison it was observed that GaAs NW FET is showing better performance i.e.\nlow DIBL and low SS and lower leakage current where Silicon NW FET offers high on current. Further effects of\ntemperature on the performance of the devices have been investigated with assist of 3D TCAD simulations. Investigation\nshows that GaAs NW FET shows better performance as compared to silicon NW FET in terms of leakage current, ION /IOFF\nratio and SCEs like SS and DIBL whereas Si NW FET show high on current (ION).


SCAWC - 2017